描述 This is the first monolithic JFET input operational amplifier to incorporate well matched, high voltage JFETs on the same chip with standard bipolar transistors (BI-FET? Technology). This amplifier features low input bias and offset currents/low offset voltage and offset voltage drift, coupled with offset adjust which does not degrade drift or common-mode rejection. The device is also designed for high slew rate, wide bandwidth, extremely fast settling time, low voltage and current noise and a low 1/f noise corner.特性AdvantagesReplace Expensive Hybrid and Module FET Op Amps Rugged JFETs Allow Blow-Out Free Handling Compared with MOSFET Input Devices Excellent for Low Noise Applications Using Either High or Low Source Impedance—Very Low 1/f Corner Offset Adjust Does Not Degrade Drift or Common-Mode Rejection as in Most Monolithic Amplifiers New Output Stage Allows Use of Large Capacitive Loads (5,000 pF) Without Stability Problems Internal Compensation and Large Differential Input Voltage CapabilityCommon Features Low Input Bias Current: 30pA Low Input Offset Current: 3pA High Input Impedance: 1012Ω Low Input Noise Current: 0.01 pA / √Hz High Common-Mode Rejection Ratio: 100 dB Large DC Voltage Gain: 106 dB Uncommon Features Extremely Fast Settling Time to 0.01% 1.5μs Fast Slew Rate 12V/μs Wide Gain Bandwidth 5MHz Low Input Noise Voltage 12 nV / √Hz All trademarks are the property of their respective owners.