The MC10E457/100E457 is a 3-bit differential 2:1 multiplexer. The fully differential data path makes the device ideal for multiplexing low skew clock or other skew sensitive signals.
The higher frequency outputs provide the device with a >1.0 GHz bandwidth to meet the needs of the most demanding system clock.
Both, separate selects and a common select, are provided to make the device well suited for both data path and random logic applications.
The differential inputs have internal clamp structures which will force the Q output of a gate in an open input condition to go to a LOW state. Thus, inputs of unused gates can be left open and will not affect the operation of the rest of the device. Note that the input clamp will take affect only if both inputs fall 2.5 V below V
.
The 100 Series contains temperature compensation.
Multiple V
pins are provided to ease AC coupling input signals. The V
pins, internally generated voltage supply pins, are available to this device only. For single-ended input conditions, the unused differential input is connected to V
as a switching reference voltage. V
may also rebias AC coupled inputs. When used, decouple V
and V
via a 0.01 F capacitor and limit current sourcing or sinking to 0.5 mA. When not used, V
should be left open.

• Differential D and Q; V
• available
• 700ps Max. Propagation Delay
• High Frequency Outputs
• Separate and Common Select
• PECL Mode Operating Range: V
• = 4.2 V to 5.7 V with V
• = 0 V
• NECL Mode Operating Range: V
• = 0 V with V
• = -4.2 V to -5.7 V
• Internal Input Pulldown Resistors
• ESD Protection: > 2 kV HBM, > 200 V MM
• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
• Moisture Sensitivity Level 1
• For Additional Information, see Application Note AND8003/D
• Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34
• Transistor Count = 218 devices
• Pb-Free Packages are Available