The PCA9535E and PCA9535EC devices provide 16 bits of General Purpose parallel Input/Output(GPIO) expansion through the I
Cbus/SMBus. The PCA9535E and PCA9535EC consist of two 8bit Configuration Input or Output selection.Input, Output and Polarity Inversion (active HIGH or active LOW operation) registers. At power on, all I/Os default to inputs. Each I/O may be configured as either input or output by writing to its corresponding I/O configuration bit. The data for each Input or Output is kept in its corresponding Input or Output register. The Polarity Inversion register may be used to invert the polarity if the read register. All registers can be read by the system master. The PCA9535E, identical to the PCA9655E but with the internal I/O pull up resistors removed, has greatly reduced power consumption when the I/Os are held LOW. The PCA9535EC is identical to the PCA9535E but with high impedance open drain outputs at all the I/O pins. The PCA9535E and PCA9535EC provide an opendrain interrupt output which is activated when any input state differs from its corresponding input port register state. The interrupt output is used to indicate to the system master that an input state has changed. The power on reset sets the registers to their default values and initializes the device state machine. Three hardware pins (AD0, AD1, AD2) are used to configure the I
Cbus slave address of the device. The I
Cbus slave addresses of the PCA9535E and PCA9535EC are the same as the PCA9655E. This allows up to 64 of these devices in any combination to share the same I
Cbus/SMBus.

• VDD Operating Range: 1.65 V to 5.5 V
• SDA Sink Capability: 30 mA
• 5.5 V Tolerant I/Os
• Polarity Inversion Register
• Active LOW Interrupt Output
• Low Standby Current
• Noise Filter on SCL/SDA Inputs
• No Glitch on Powerup
• Internal Poweron Reset
• 64 Programmable Slave Addresses using Three Address Pins
• 16 I/O Pins which Default to 16 Inputs