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Microchip’s dsPIC33E family of digital signal controllers (DSCs) features a 70 MIPS dsPIC? DSC core with integrated DSP and enhanced on-chip peripherals. These DSCs enable the design of high-performance, precision motor control systems that are more energy efficient, quieter in operation, have a great range and extended life. They can be used to control brushless DC, permanent magnet synchronous, AC induction and stepper motors. These devices are also ideal for high-performance general purpose applications.
Operating Conditions3.0V to 3.6V, -40oC to +85oC, DC to 70 MIPS
3.0V to 3.6V, -40oC to +125oC, DC to 60 MIPS
dsPIC33E DSC CoreModified Harvard Architecture
C Compiler Optimized Instruction Set
16-bit Wide Data Path
24-bit Wide Instructions
16x16 Integer Multiply Operations
32/16 and 16/16 Integer Divide Operations
Two 40-bit Accumulators with Rounding and Saturation Options
Single-Cycle Multiply and Accumulate
Single-Cycle shifts for up to 40-bit Data
16x16 Fractional Multiply/Divide Operations
High-Speed PWMUp to three PWM pairs with independent timing
Dead time for rising and falling edges
7.14 ns PWM resolution
PWM support for:- Inverters, PFC, Lighting- BLDC, PMSM, ACIM, SRM
Programmable Fault inputs
Flexible trigger configurations for ADC conversions
Advanced Analog FeaturesADC module:- Configurable as 10-bit, 1.1 Msps with four S&H or12-bit, 500 ksps with one S&H
Up to three Op amp/Comparators:- Op Amp direct connection to the ADC module- Additional dedicated comparator- Programmable references with 32 voltage points for comparators
Charge Time Measurement Unit (CTMU):- Supports mTouch? capacitive touch sensing
Timers/Output Compare/Input Capture12 general purpose timers:- Five 16-bit and up to two 32-bit timers/counters- Four OC modules configurable as timers/counters- PTG module with two configurable timers/counters- 32-bit Quadrature Encoder Interface (QEI) module configurable as a timer/counter
Four IC modules
Peripheral Trigger Generator (PTG) for scheduling complex sequences
Communication InterfacesTwo UART modules (15 Mbps)
Two 4-wire SPI modules (15 Mbps)
Two I2C? modules (up to 1 Mbaud) with SMBus support
PPS to allow function remap
Programmable Cyclic Redundancy Check (CRC)
Direct Memory Access (DMA)4-channel DMA with user-selectable priority arbitration
UART, SPI, ADC, IC, OC, and Timers

DSPIC33EP32MC202 封裝圖

DSPIC33EP32MC202 封裝圖

DSPIC33EP32MC202 封裝圖

DSPIC33EP32MC202 封裝圖

DSPIC33EP32MC202 封裝圖

DSPIC33EP32MC202 封裝圖

DSPIC33EP32MC202 封裝圖

DSPIC33EP32MC202 封裝圖

DSPIC33EP32MC202 封裝圖

DSPIC33EP32MC202 封裝圖

DSPIC33EP32MC202 封裝圖

DSPIC33EP32MC202 封裝圖
| 型號(hào) | 制造商 | 描述 | 購(gòu)買(mǎi) |
|---|---|---|---|
| DSPIC33EP32MC202-E/MM | - | - | 立即購(gòu)買(mǎi) |
| DSPIC33EP32MC202T-E/SS | - | - | 立即購(gòu)買(mǎi) |
| DSPIC33EP32MC202T-E/SO | IDT | ICPCISW48LANE12PORT676BGA | 立即購(gòu)買(mǎi) |
| DSPIC33EP32MC202T-E/MM | Microchip | RAM總?cè)萘浚?KB FLASH容量:32K@x16bit | 立即購(gòu)買(mǎi) |
| DSPIC33EP32MC202-E/SS | - | - | 立即購(gòu)買(mǎi) |
| DSPIC33EP32MC202T-I/MM | TI | Interface 56-TSSOP | 立即購(gòu)買(mǎi) |
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... 70 MIPS 3.0V 至 3.6V, -40C 至 +125C, DC 至 60 MIPS 內(nèi)核:16 位 dsPIC33E/PIC24E CPU 高效代碼型 (C 和匯編)架構(gòu) 兩個(gè) 40 位寬累加器 帶雙數(shù)據(jù)取操作的單周期 (MAC/MPY) 單周期混合符號(hào)乘法和硬件除法 32 位乘法支持 時(shí)鐘管理 1.0% 精度內(nèi)...