Microchip’s dsPIC33E general purpose DSC family features the highest speed 70 MIPS core with excellent performance and code density. It offers superior ADC performance, enhanced CAN communication, easier graphic display interface through 8-bit parallel master port and up to 15 DMA channels for extensive data movement. These devices are available in various packages and with extended (125°C) temp option.

Operating Conditions

  3.0V to 3.6V, -40oC to +125oC, DC to 60 MIPS

  3.0V to 3.6V, -40oC to +85oC, DC to 70 MIPS

Core: 16-bit dsPIC33E

  Modified Harvard Architecture

  C Compiler Optimized Instruction Set

  16-bit Wide Data Path

  24-bit Wide Instructions

  16x16 Integer Multiply Operations

  32/16 and 16/16 Integer Divide Operations

  11 Additional Instructions

  Two 40-bit Accumulators with Rounding and Saturation Options

  Flexible and Powerful Addressing modes

  Single-Cycle Multiply and Accumulate

  Single-Cycle shifts for up to 40-bit Data

  16x16 Fractional Multiply/Divide Operations

Advanced Analog Features

  Two independent ADC modules:

  One ADC configurable as 10-bit, 1.1 Msps with four

S&H or 12-bit, 500 ksps with one S&H

  One 10-bit ADC, 1.1 Msps with four S&H

  Eight S&H using both ADC 10-bit modules

  24 analog channels (64-pin devices) up to 32 analog

channels (100/121/144-pin devices)

  Flexible and independent ADC trigger sources

  Comparators:

  Up to three Analog Comparator modules

  Programmable references with 32 voltage points

Timers / Capture / Compare / Standard PWM

  9 16-bit Timers/Counters. Unused Output compares can be used as standard times fora total of 25 timers.

  16 Input Capture

  16 Output Compare/ PWM

  Hardware Real-Time Clock and Calendar

  Peripheral Pin Select (PPS) to allow function remap

Direct Memory Access (DMA)

  15-channel DMA with user-selectable priority arbitration

  UART, SPI, ADC, ECAN, IC, OC, Timers, DCI/I2S, PMP

Note: Please refer to datasheet for a complete list of features